Volume No. :   2

Issue No. :  1

Year :  2011

ISSN Print :  0976-2973

ISSN Online :  2321-581X


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Design of High Performance Digital Fir Filter Using Distributed Arithmetic Algorithm with Residue Number System



Address:   Antim Bala Sharma1, T. Vigneswaran2, Ajay Sharma3*, Fanibhushan Sharma4, Nirmala Sharma5
1Asst. Professor Gurukul Institute of Engineering and Technology Kota,
2Professor Department of Electronics and Communication Engineering S.R.M. University Kattankuluthar
3Asst. Professor Maharishi Arvind International Institute of Technology Kota
4Asst. Professor St. Margaret Engineering College Neemrana,
5Asst. Professor Rajasthan Technical University Kota
*Corresponding Author
DOI No:

ABSTRACT:
The use of the proposed method in residue to binary conversion in Residue Number System (RNS) and Distributed Arithmetic Algorithm (DAA) in modern telecommunication and multimedia applications is becoming more and more important because it allows interesting advantages in terms of area, power consumption and speed.. This paper presents new method for conversion procedure (residue to binary) based on a {2n-1,2n, 2n+1, 2n+1+1, 2n-1-1} moduli set. Based on the proposed method for conversion in RNS and DAA algorithm, an architecture which efficiently implements the digital fir filter is synthesized using Xilinx Virtex2. Proposed method simplify the computing procedure by maximizing the utilization of the modulo-mi adders and multipliers present in the RNS functional units. For an n-digit RNS number X = (x1, x2, x3, …., xn) the proposed method takes at most n iterations. Each iteration requires one parallel subtractions and 2 multiplications except the first one.
KEYWORDS:
Residue arithmetic, Distributed arithmetic, FIR filters, high speed, VLSI.
Cite:
Antim Bala Sharma, T. Vigneswaran, Ajay Sharma, Fanibhushan Sharma, Nirmala Sharma. Design of High Performance Digital Fir Filter Using Distributed Arithmetic Algorithm with Residue Number System. Research J. Engineering and Tech. 2(1): Jan.-Mar. 2011 page 21-25.
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